The third video in the Picotest/Keysight How-To Design for Power Integrity series is now available.
Power supply switching ripple and control loop phase margin are dominated by the output inductor and the bulk capacitors. Simple RLC capacitor and inductor models can result in a design with more capacitors than necessary adding to the design cost, consuming valuable circuit board real estate and degrading the control loop performance. Most capacitor datasheets provide very limited information, such as maximum ESR at 100kHz and not the desired information regarding typical values and frequency dependencies of the C, ESR, and ESL.
This short video shows you how to make these measurements efficiently and how to use the results to create high fidelity models for simulation.