There are cases where a Bode (gain?phase) plot cannot be obtained from a control loop. For example, a three terminal regulator or hybrid may not have its control loop exposed. With integrated production hardware, it may not be possible to break into the control loop and inject a signal. In these cases the stability may still be determined by testing or simulating the circuit’s output impedance. This includes the stability of control loops associated with power supply circuits and opamps, regardless if the circuit is being bench tested or simulated in SPICE. Both bandwidth and phase margin can be determined from output impedance by observing peaking in the group delay of the impedance.
Group delay is the time distortion between two signals (the two signals in this case being the perturbated load current and resulting voltage response) and is obtained by differentiating the phase difference between the current and the voltage. Group delay is defined as:
This derivation can be easily made to the phase curve using the post?processing program found in most SPICE software suites. Once the group delay curve has been plotted, peaking in the curve is indicative of a rapid phase transition. Rapid phase transitions occur primarily in two cases:
There is an LC resonance from a filter or self?resonance of an inductor or capacitor
The zero crossing of a single?order system’s loop gain.
Each peak in the group delay represents a unique Quality Factor or “Q” and these peaks can present themselves as voltage oscillations with dynamic load currents at the frequency of the peak. The higher the Q of each peak, the more susceptible the circuit is to oscillations at that peak’s frequency. Q is defined as: