High-speed digital circuits need clean power, but can stress power systems in ways that make it difficult for the system to deliver what’s needed. For example, the current drawn by high-speed processors and FPGAs can change by tens of amperes in a nanosecond. The power system is expected to remain stable when this occurs, without ringing, over-shooting or under-shooting, or responding in any way that might cause the circuitry to misbehave.
Maintaining clean, regulated voltage requires more than a high-quality power supply. The power distribution network (PDN)—which, together with the power supply itself, form the power system—must maintain a low source impedance, with minimal resistance and well-controlled reactive elements.
Designers can validate impedance performance by measuring the impedance with a network analyzer.