Impedance measurements make a difference at DesignCon
What do clock jitter, EMI, control loop stability, SPICE modeling, rogue waves and the ripeness of fruit have in common? Do you need to develop lower cost, higher performance products, in less time and in a smaller physical space? Or do you just need to learn the fastest method to troubleshoot issues in distributed systems?
At DesignCon 2015 on Tuesday, January 27th from 9AM-12PM we’ll show how impedance plays a role in all of these questions. This tutorial focuses on how circuit performance is related to impedance as well as the numerous methods and instruments available to accurately measure impedance. Finally we’ll use real world case studies to illustrate how impedance measurements provide the solutions we desperately need.
We’ll also address a few questions you’ve probably been thinking about but were too shy to ask: You were taught to maintain PDN impedance below a target value, but can a PDN have an impedance that’s too LOW? Is a linear regulator really better than a switching regulator for powering a low jitter clock? Is it really a problem if there is a little ringing in my circuit? Is it true that a single CMOS logic gate presents a significant PDN challenge? We’ll answer these questions and more.
Click here to read the entire article.
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