Is it possible to design an unconditionally stable linear voltage regulator? In fact, many believe that most regulator ICs are unconditionally stable. The answer is both simple and complex, if it is possible to be both.
We recently derived the phase margin of a linear regulator from its output impedance measurement. The output impedance was described in terms of a passive series inductor and resistor and sometimes also including a parallel resistance. The phase margin was evaluated through its relationship with the Q resulting from this network and the output capacitor, including the parasitic ESR of the capacitor.