I need to measure the Zpdn of a system, which is currently in the prototype stage. The load will be an SoC, which we don't have yet, so this system will have a custom prototype BGA substrate.
Among other things, I'm prototyping the VRM which can source >100A. I want to measure its impedance across its operating range, so I need to create an equivalent load.
For transients, a LoadSlammer should do the trick. For steady-state Zpdn measurements, I need a DC load. An nice solution would be to synchronise a BODE100 to LoadSlammer pulses, but AFAIK that's not possible (and the durations of the pulses may be too short).
At such high currents, I can't use wires and external electronic loads, due to the DC drops and inductance.
Heat will obviously be an issue, so power resistors in heatsinks look like an option (mounted on the PCB and switched by FETs). Placement and current-share then becomes an issue, and it's clear that these devices aren't designed to minimise parasitic L and C.
I'm wondering if it would be better to build a load on the BGA substrate using FETs? I'm a novice in this area - is there an off-the-shelf, small-footprint, low-risk way to do this, which makes heat-removal easy? Or is there a better way, which I'm missing?